Referring to FIG. 1, a video decoder 102 generally generates pictures from compressed video data. In a particular decompression technique, the video decoder 102 generates a subsequent picture from a reference picture stored in a memory device 104. FIG. 2 illustrates such a reference picture 106 stored in the memory device 104. The reference picture 106 is comprised of multiple pixel lines of pixel data (each circled number in FIG. 2 represents data for one pixel of the reference picture). Each pixel line of the reference picture 106 may be for a raster scan line of a display device.
For generating the subsequent picture, the video decoder 102 reads and processes a block 108 of pixel data at a time. Because data in different pixel lines are typically stored with discontinuous addresses, the video decoder 102 issues multiple read requests for reading multiple pixel lines in the block 108 from the memory device 104.
FIG. 3 shows a time line for an example of such multiple read requests REQ_1 and REQ_2 that are for reading pixel data from a first pixel line (Line 1 in FIG. 2) and a second pixel line (Line 2 in FIG. 2) for the block 108. The first read request REQ_1 is issued by the video decoder 102 to the memory device 104 at a time point T1 for reading from the first pixel line. After a first latency LAT_1 from time point T1, the pixel data of the first pixel line for the block 108 is transferred from the memory device 104 to the video decoder 102 for a time period of READ_1 (i.e., T4-T3).
In addition, the second read request REQ_2 is issued by the video decoder 102 to the memory device 104 at a time point T2 for reading from the second pixel line, shortly after the time point T1. After a second latency LAT_2 from time point T2, the pixel data of the second pixel line for the block 108 is transferred from the memory device 104 to the video decoder 102 for a time period of READ_2 (i.e., T5-T4).
Referring to FIG. 3, READ_2 does not begin until after READ_1 is completed, resulting in extension of the second latency LAT_2 which in turn undesirably increases latency for video decoding. Thus, a mechanism is desired for minimizing such latency in video decoding.